The offered approach to synthesis of sequential circuits includes the
following operations:
- Depending on architectural features PLD, places of a subsystem
in the digital system, requirements at cost and speed, properties of
the sequential circuit for each subsystem are selected the most
approaching models of finite state automations;
- On the basis of absolute properties of the finite state
automation and selected models the most approaching method of synthesis
is defined(determined);
- Synthesis of classes of finite state automations of appropriate
models is fulfilled;
- The Booleen Function System of combinatorial parts of finite
state automations are created, their minimization is if necessary
fulfilled;
- Synthesis of a Booleen Function System by one of methods of
synthesis of combinatorial circuits on PLD is fulfilled.
On PLD the following features are inherent in methods of synthesis of
finite state automations Offered below:
- Wide usage of architectural possibilities PLD:
- Output triggers as units of
memory (an automaton of C class);
- Triggers in chains of feedbacks as units of memory (an automaton
of D class);
- Entry buffers as units of memory (automata of E classes and F);
- Macrocells with two feedbacks (automata of A classes and B on
universal PAL);
- Various number of the intermediate buses, connected to each
macrocell (automata of A classes and B on universal PAL)
- Wide usage of the operation of decomposition of inwardnesses of
the finite state automation (the given operation concerns to equivalent
conversions of the finite state automation and does not change
algorithm of his(its) operation):
- For construction of the finite
state automation of the best speed (automata of A classes and B);
- For coercion of finite state automations of Mile to an automaton
of D class (decomposition on dialingouts);
- For coercion of finite state automations of Mile and Moore to
automata of E classes and F accordingly (decomposition on dialingins);
- Introduction of minimum number of additional internal variables
for distinction of codes of inwardnesses of finite state automations of
various classes;
- Depending on architectural possibilities PLD overlapping of
various classes of finite state automations in one structure of the
finite state automation.